Consider the following function to be implemented using a multiplexer:
Expanding to standard sum of products form
Arranging in index order:
To obtain the data input values, all the minterms possible are listed with the data variable set as true and as false. Each minterm pair with its data variable value has a difference equal to the binary weight of the data variable. As the data variable has been chosen to be A, which has binary weight = 4, the difference is 4. The minterms corresponding to those of the required function are now bracketed.
For both terms of a pair bracketed, set the data input value to 1.
For both terms of a pair not bracketed, set the data input value to 0.
For pairs with one term bracketed, set the data input value to the data variable value.
The function is presented in decimal form and the index found. The minterms are then compared in order to find the data variable.
All the minterms are then listed together with the data variable set as true and false in order to find the data input values.
The resulting multiplexer arrangement is:
Alternatively one could have used a 8-line to 1-line multiplexer:
The don't care minterm in this example is listed along with the other minterms in order to find the data variable.
When listed with all the possible minterms the don't care condition provides two possible data input values.
Using 4-line to 1-line multiplexers the logic circuit is as follows:
There are so many inputs at either 0 or 1, is it possible to economise further? (i.e. reduce the number of integrated circuit packages). For example use an 8-line to 1-line multiplexer?
From our previous list select the two longest lists, say B and E. Therefore let B,E be the data variables.
The resulting logic circuit becomes:
1 package plus 1/2 X Quad 2-input OR gate